? semiconductor components industries, llc, 2009 march, 2009 ? rev. 5 1 publication order number: ntd23n03r/d ntd23n03r power mosfet 23 a, 25 v, n ? channel dpak features ? planar hd3e process for fast switching performance ? low r ds(on) to minimize conduction loss ? low c iss to minimize driver loss ? low gate charge ? optimized for high side switching requirements in high ? efficiency dc ? dc converters ? pb ? free packages are available maximum ratings (t j = 25 c unless otherwise specified) parameter symbol value unit drain ? to ? source voltage v dss 25 vdc gate ? to ? source voltage ? continuous v gs 20 vdc thermal resistance, junction ? to ? case total power dissipation @ t c = 25 c drain current ? continuous @ t c = 25 c, chip ? continuous @ t c = 25 c, limited by package ? single pulse r jc p d i d i d i dm 5.6 22.3 23 17.1 40 c/w w a a a thermal resistance, junction ? to ? ambient (note 1) total power dissipation @ t a = 25 c drain current ? continuous @ t a = 25 c r ja p d i d 76 1.64 4.5 c/w w a thermal resistance, junction ? to ? ambient (note 2) total power dissipation @ t a = 25 c drain current ? continuous @ t a = 25 c r ja p d i d 110 1.14 3.8 c/w w a operating and storage temperature range t j , t stg ? 55 to 150 c maximum lead temperature for soldering purposes, 1/8 from case for 10 seconds t l 260 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. when surface mounted to an fr4 board using 0.5 sq in pad size. 2. when surface mounted to an fr4 board using minimum recommended pad size. d s g n ? channel 25 v 32 m r ds(on) typ 23 a i d max v (br)dss 1 gate 3 source 2 drain 4 drain dpak case 369aa (surface mounted) style 2 t23n03 = device code a = assembly location y = year ww = work week g = pb ? free package 1 2 3 4 dpak ? 3 case 369d (straight lead) style 2 1 2 3 4 marking diagrams ayww t23 n03g 1 gate 3 source 2 drain 4 drain ayww t23 n03g see detailed ordering and shipping information in the package dimensions secti on on page 5 of this data sheet. ordering information http://onsemi.com
ntd23n03r http://onsemi.com 2 electrical characteristics (t j = 25 c unless otherwise specified) characteristics symbol min typ max unit off characteristics drain ? to ? source breakdown voltage (note 3) (v gs = 0 vdc, i d = 250 adc) temperature coefficient (positive) v(br) dss 25 ? 28 ? ? ? vdc mv/ c zero gate voltage drain current (v ds = 20 vdc, v gs = 0 vdc) (v ds = 20 vdc, v gs = 0 vdc, t j = 150 c) i dss ? ? ? ? 1.0 10 adc gate ? body leakage current (v gs = 20 vdc, v ds = 0 vdc) i gss ? ? 100 nadc on characteristics (note 3) gate threshold voltage (note 3) (v ds = v gs , i d = 250 adc) threshold temperature coefficient (negative) v gs(th) 1.0 ? 1.8 ? 2.0 ? vdc mv/ c static drain ? to ? source on ? resistance (note 3) (v gs = 4.5 vdc, i d = 6 adc) (v gs = 10 vdc, i d = 6 adc) r ds(on) ? ? 50.3 32.3 60 45 m forward transconductance (note 3) (v ds = 10 vdc, i d = 6 adc) g fs ? 13 ? mhos dynamic characteristics input capacitance (v ds = 20 vdc, v gs = 0 v, f = 1 mhz) c iss ? 225 ? pf output capacitance c oss ? 108 ? transfer capacitance c rss ? 48 ? switching characteristics (note 4) turn ? on delay time (v gs = 10 vdc, v dd = 10 vdc, i d = 6 adc, r g = 3 ) t d(on) ? 2.0 ? ns rise time t r ? 14.9 ? turn ? off delay time t d(off) ? 9.9 ? fall time t f ? 2.0 ? gate charge (v gs = 4.5 vdc, i d = 6 adc, v ds = 10 vdc) (note 3) q t ? 3.76 ? nc q 1 ? 1.7 ? q 2 ? 1.6 ? source ? drain diode characteristics forward on ? voltage (i s = 6 adc, v gs = 0 vdc) (note 3) (i s = 6 adc, v gs = 0 vdc, t j = 125 c) v sd ? ? 0.87 0.74 1.2 ? vdc reverse recovery time (i s = 6 adc, v gs = 0 vdc, di s /dt = 100 a/ s) (note 3) t rr ? 8.7 ? ns t a ? 5.2 ? t b ? 3.5 ? reverse recovery stored charge q rr ? 0.003 ? c 3. pulse test: pulse width 300 s, duty cycle 2%. 4. switching characteristics are independent of operating junction temperatures.
ntd23n03r http://onsemi.com 3 10 v 1.8 1.6 1.2 1.4 1 0.8 0.6 1000 10 10,000 8 4 12 0 20 0.08 0 16 10 4 4 2 v ds , drain ? to ? source voltage (volts) i d , drain current (amps) 0 v gs , gate ? to ? source voltage (volts) figure 1. on ? region characteristics figure 2. transfer characteristics i d , drain current (amps) 0 0.16 0.20 8 4 0.12 0.08 0.04 0 16 12 figure 3. on ? resistance versus drain current and temperature i d , drain current (amps) figure 4. on ? resistance versus drain current and temperature i d , drain current (amps) r ds(on) , drain ? to ? source resistance ( ) r ds(on) , drain ? to ? source resistance ( ) figure 5. on ? resistance variation with temperature t j , junction temperature ( c) figure 6. drain ? to ? source leakage current versus voltage v ds , drain ? to ? source voltage (volts) r ds(on) , drain ? to ? source resistance (normalized) i dss , leakage (na) 20 ? 50 50 25 0 ? 25 75 125 100 034 2 15 08 416 12 0 0.04 0.12 0.20 02025 15 10 5 v gs = 2.5 v 6 8 v ds 10 v t j = 25 c t j = ? 55 c t j = 125 c 6 t j = 25 c t j = ? 55 c t j = 125 c v gs = 10 v v gs = 4.5 v 150 v gs = 0 v t j = 150 c t j = 125 c i d = 6 a v gs = 10 v 0.16 t j = 25 c t j = ? 55 c t j = 125 c 20 20 16 8 12 5 v 3.5 v 4 v 4.5 v 8 v 6 v 3 v 100
ntd23n03r http://onsemi.com 4 100 10 1 8 6 4 2 0 10 6 8 4 0 10 10 400 15 5 020 gate ? to ? source or drain ? to ? source voltage (volts) c, capacitance (pf) 300 200 100 0 5 q g , total gate charge (nc) figure 7. capacitance variation figure 8. gate ? to ? source and drain ? to ? source voltage versus total charge v gs , gate ? to ? source voltage (volts) figure 9. resistive switching time variation versus gate resistance r g , gate resistance ( ) figure 10. diode forward voltage versus current v sd , source ? to ? drain voltage (volts) i s , source current (amps) t, time (ns) 0 3.5 4.5 2.5 1.5 0.5 1 10 100 0 0.4 0.2 0.8 1.0 i d = 6 a t j = 25 c v gs v gs = 0 v v ds = 0 v t j = 25 c c rss c iss c oss c rss 2 0.6 q 2 c iss v ds = 10 v i d = 6 a v gs = 10 v v gs = 0 v t r t d(off) t d(on) t f v gs v ds q 1 q t t j = 25 c t j = 150 c 3.0 4.0 2.0 1.0 100 10 1 figure 11. maximum rated forward biased safe operating area v ds , drain ? to ? source voltage (volts) i d , drain current (amps) 1 10 100 v gs = 20 v single pulse t c = 25 c 0.1 0.1 r ds(on) limit thermal limit package limit 10 s 100 s 1 ms 10 ms dc
ntd23n03r http://onsemi.com 5 p (pk) t 1 t 2 duty cycle, d = t 1 /t 2 figure 12. thermal response t, time (s) 10 1 0.00001 0.001 0.01 0.1 10 0.0001 1 0.1 r(t), normalized effective transient thermal resistance d = 0.5 0.2 0.1 single pulse 0.05 0.01 ordering information device package shipping ? ntd23n03rg dpak (pb ? free) 75 units/rail ntd23n03r ? 1g dpak ? 3 (pb ? free) 75 units/rail ntd23n03rt4 dpak 2500 tape & reel ntd23n03rt4g dpak (pb ? free) 2500 tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ntd23n03r http://onsemi.com 6 package dimensions dpak case 369aa ? 01 issue o style 2: pin 1. gate 2. drain 3. source 4. drain d a b r v s f l 2 pl m 0.13 (0.005) t e c u j ? t ? seating plane z dim min max min max millimeters inches a 0.235 0.245 5.97 6.22 b 0.250 0.265 6.35 6.73 c 0.086 0.094 2.19 2.38 d 0.025 0.035 0.63 0.89 e 0.018 0.024 0.46 0.61 f 0.030 0.045 0.77 1.14 j 0.018 0.023 0.46 0.58 l 0.090 bsc 2.29 bsc r 0.180 0.215 4.57 5.45 s 0.024 0.040 0.60 1.01 u 0.020 ??? 0.51 ??? v 0.035 0.050 0.89 1.27 z 0.155 ??? 3.93 ??? notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 123 4 5.80 0.228 2.58 0.101 1.6 0.063 6.20 0.244 3.0 0.118 6.172 0.243 mm inches scale 3:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* h 0.386 0.410 9.80 10.40 h
ntd23n03r http://onsemi.com 7 package dimensions dpak ? 3 case 369d ? 01 issue b style 2: pin 1. gate 2. drain 3. source 4. drain 123 4 v s a k ? t ? seating plane r b f g d 3 pl m 0.13 (0.005) t c e j h dim min max min max millimeters inches a 0.235 0.245 5.97 6.35 b 0.250 0.265 6.35 6.73 c 0.086 0.094 2.19 2.38 d 0.027 0.035 0.69 0.88 e 0.018 0.023 0.46 0.58 f 0.037 0.045 0.94 1.14 g 0.090 bsc 2.29 bsc h 0.034 0.040 0.87 1.01 j 0.018 0.023 0.46 0.58 k 0.350 0.380 8.89 9.65 r 0.180 0.215 4.45 5.45 s 0.025 0.040 0.63 1.01 v 0.035 0.050 0.89 1.27 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. z z 0.155 ??? 3.93 ??? on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. ntd23n03r/d publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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